#include "processor.h"

unsigned long long rdtsc()
{
	__asm
	{
		cpuid
		rdtsc
	}
}

bool SSE3_is_avail()
{
	__asm
	{
		mov eax, 1               ;// Request for feature flags
		cpuid                    ;// 0FH, 0A2H cpuid instruction
		test ecx, 000000001h     ;// 
	}
}

#define DAZ 6

inline void set___denormals_are_zero()
{
	unsigned long MXCSR = 0;

	__asm
	{
		STMXCSR MXCSR
	}
	MXCSR |= (1 << DAZ);
	__asm
	{
		LDMXCSR MXCSR
		;//MASKMOVDQU xmm0, xmm1 // see the instruction
	}
}

// SSE4.1 introduces the insertps instruction
inline void set___XMM7(const float src)
{
	__asm
	{
		movss xmm7,src
		shufps xmm7,xmm7,0x00
	}
}